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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
INTRODUCTION
The S6A0070 is a dot matrix LCD driver & controller LSI which is fabricated by low power CMOS technology. It is capable of displaying 1 or 2 lines with the 5 x 7 format or 1 line with the 5 x 10 dots format. The mirror type of S6A0070: S6A1070
FUNCTION
-- -- -- -- -- -- -- -- -- --
Character type dot matrix LCD driver & controller Internal driver: 16 common and 80 segment signal output Easy Interface with a 4-bit or 8-bit MPU Display character pattern: 5 x 7 dots format (192 kinds), 5 x 10 dots format (32 kinds) The special character pattern is directly programmable by the Character Generator RAM. A customer character pattern is programmable by mask option. It can drive a maximum 80 characters by using the S6A0065 or S6A2067 externally. Various instruction functions Built-in automatic power on reset Driving method is A-type (line inversion)
FEATURES
--
Internal Memory - Character Generator ROM: 8320bits (192 cha. X 5 x 7 dots) & (32 cha. X 5 x 10 dots) - Character Generator RAM: 64 x 8 bits (8 cha. X 5 x 7 dots) - Display Data RAM: 80 x 8 bits for 80 digits (80 characters max.)
-- -- -- -- -- --
Power Supply Voltage: 2.7 to 5.5 V (V DD) LCD Driving Voltage: 3.0 to 10.0 V (V DD - V5) Supply Voltage for display: 0 to -5V (V5) Programmable duty cycle: 1/8 duty, 1/11 duty or 1/16 Internal oscillator with an external resistor Bare die or bumped chip available
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S6A0070
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Precautions for Light Light has characteristics to move electrons in the integrated circuitry of semiconductors, therefore may change the characteristics of semiconductor devices when irradiated with light. Consequently, the users of the packages which may expose chips to external light such as COB, COG, TCP and COF must consider effective methods to block out light from reaching the IC on all parts of the surface area, the top, bottom and the sides of the chip. Follow the precautions below when using the products. 1. Consider and verify the protection of penetrating light to the IC at substrate (board or glass) or product design stage. Always test and inspect products under the environment with no penetration of light.
2.
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
BLOCK DIAGRAM
VDD GND V1 V2 V3 V4 V5 Busy Flag
Parallel/Serial Data Conversion Circuit 5 Character Generator ROM (CGROM) 8320 bits 8 5 Character Generator RAM (CGRAM) 512 bits 8 8 8 8 Instruction 8 Register (IR) 7 Address Counter (AC) 7 16-bit Shift Register 16-bit 16 Common Driver COM1COM16 CLK1 CLK2 M Instruction Decoder (ID) 7 Display Data RAM (DDRAM) 7 640 bits Cursor & Blink Controller Circuit
DB0-DB3 4 8 DB4-DB7 4 Input/ Output Buffer
Data Register (DR)
R/W RS E
80-bit Shift Register
80-bit Latch Circuit
Seg80 ment Driver SEG1SEG80 D
OSC1 OSC2
Timing Generator Circuit
Figure 1. S6A0070 Block Diagram
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S6A0070
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN CONFIGURATION
NC SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VSS OSC2 OSC1 NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59
S6A0070
SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 SEG80 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 NC
4
NC NC NC V1 V2 V3 V4 V5 CLK1 CLK2 M D RS R/W E VDD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 TEST NC
39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
Figure 2. S6A0070 Pin Configuration
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
PAD CONFIGURATION
Figure 3.Normal Type PAD Configuration
SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VSS OSC2 OSC1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103
SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59
Y X (0,0) CHIP SIZE: 3920 x 5070 PAD SIZE: 100 x 100 UNIT: m
102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66
SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 SEG80 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1
V1 V2 V3 V4 V5 CLK1 CLK2 M D RS R/W E VDD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 TEST
42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
S6A0070
5
S6A0070
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Figure 4.Mirror Type PAD Configuration
SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 SEG80 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103
SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34
S6A1070
Y X (0,0) CHIP SIZE: 3920 x 5070 PAD SIZE: 100 x 100 UNIT: m
102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67
SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VSS OSC2 OSC1
6
TEST DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 VDD E R/W RS D M CLK2 CLK1 V5 V4 V3 V2 V1
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
PAD CENTER COORDINATES
Table 1.Normal Type PAD Coordinate (S6A0070)
PAD NUM. PAD NAME COORDINATE X Y PAD NUM. PAD NAME COORDINATE X Y PAD NUM. PAD NAME COORDINATE X Y
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 S33 S32 S31 S30 S29 S28 S27 S26 S25 S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5
NC -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 2169 2044 1919 1794 1669 1544 1419 1294 1169 1044 919 794 669 544 419 294 169 44 -81 -206 -331 -456 -581 -706 -831 -956 -1081 -1206 -1331
44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73
V3 V4 V5 CLK1 CLK2 M D RS R/W E VDD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 TEST
-905 -780 -655 -530 -405 -280 -155 -30 95 220 345 470 595 720 845 970 1095 1220 1345 1470 NC NC
-2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369
87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108
S75 S74 S73 S72 S71 S70 S69 S68 S67 S66 S65 S64 S63 S62 S61 S60 S59 S58 S57 S56 S55 S54 S53 S52 S51 S50 S49 S48 S47 S46
1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1563 1438 1313 1183 1063 938 813 688 563 438 313 188 63 -62
294 419 544 669 794 919 1044 1169 1294 1419 1544 1669 1794 1919 2044 2169 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369
C1 C2 C3 C4 C5 C6 C7 C8
1794 1794 1794 1794 1794 1794 1794 1794
-2331 -2206 -2081 -1956 -1831 -1706 -1581 -1456
109 110 111 112 113 114 115 116
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S6A0070
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Normal Type Pad Coordinate (Continued)
PAD NUM. PAD NAME COORDINATE X Y PAD NUM. PAD NAME COORDINATE X Y PAD NUM. PAD NAME COORDINATE X Y
31 32 33 34 35 36 37 38 39 40 41 42 43
S4 S3 S2 S1 VSS OSC2 OSC1
-1794 -1794 -1794 -1794 -1794 -1794 -1794 NC NC NC NC
-1456 -1581 -1706 -1831 -1956 -2106 -2231
74 75 76 77 78 79 80 81 82 83 84
C9 C10 C11 C12 C13 C14 C15 C16 S80 S79 S78 S77 S76
1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794
-1331 -1206 -1081 -956 -831 -706 -581 -456 -331 -206 -81 44 169
117 118 119 120 121 122 123 124 125 126 127 128
S45 S44 S43 S42 S41 S40 S39 S38 S37 S36 S35 S34
-187 -312 -437 -562 -687 -812 -937 -1062 -1187 -1312 -1437 -1562
2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369
V1 V2
-1155 -1030
-2369 -2369
NOTE:
85 86
"S6A0070" Marking: easy to find the PAD No. 98.
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
Table 2. Mirror Type PAD Coordinate (S6A1070)
PAD NUM. PAD NAME COORDINATE X Y PAD NUM. PAD NAME COORDINATE X Y PAD NUM. PAD NAME COORDINATE X Y
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 S60 S61 S62 S63 S64 S65 S66 S67 S68 S69 S70 S71 S72 S73 S74 S75 S76 S77 S78 S79 S80 C16 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6
NC -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 -1794 2169 2044 1919 1794 1669 1544 1419 1294 1169 1044 919 794 669 544 419 294 169 44 -81 -206 -331 -456 -581 -706 -831 -956 -1081 -1206 -1331 -1456 -1581 -1706
44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76
DB5 DB4 DB3 DB2 DB1 DB0 VDD E RW RS D M CLK2 CLK1 V5 V4 V3 V2 V1
-1095 -970 -845 -720 -595 -470 -345 -220 -95 30 155 280 405 530 655 780 905 1030 1155 NC NC NC NC
-2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369 -2369
87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109
S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38 S39 S40 S41 S42 S43 S44 S45 S46 S47 S48 S49 S50
1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1794 1562 1437 1312 1187 1062 937 812 687 562 437 312 187 62 -63 -188 -313 -438
294 419 544 669 794 919 1044 1169 1294 1419 1544 1669 1794 1919 2044 2169 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369 2369
OSC1 PSC2 VSS S1 S2 S3 S4 S5 S6 S7
1794 1794 1794 1794 1794 1794 1794 1794 1794 1794
-2231 -2106 -1956 -1831 -1706 -1581 -1456 -1331 -1206 -1081
110 111 112 113 114 115 116 117 118 119
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S6A0070
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Mirror Type Pad Coordinate (Continued)
PAD NUM. PAD NAME COORDINATE X Y PAD NUM. PAD NAME COORDINATE X Y PAD NUM. PAD NAME COORDINATE X Y
34 35 36 37 38 39 40 41 42 43
NOTE:
C5 C4 C3 C2 C1
-1794 -1794 -1794 -1794 -1794 NC NC
-1831 -1956 -2081 -2206 -2331
77 78 79 80 81 82 83
S8 S9 S10 S11 S12 S13 S14 S15 S16 S17
1794 1794 1794 1794 1794 1794 1794 1794 1794 1794
-956 -831 -706 -581 -456 -331 -206 -81 44 169
120 121 122 123 124 125 126 127 128
S51 S52 S53 S54 S55 S56 S57 S58 S59
-563 -688 -813 -938 -1063 -1188 -1313 -1438 -1563
2369 2369 2369 2369 2369 2369 2369 2369 2369
TEST DB7 DB6
-1470 -1345 -1220
-2369 -2369 -2369
84 85 86
"S6A1070" Marking: easy to find the PAD No. 12.
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
PIN DESCRIPTION
Table 3. S6A0070 Pin Description Pad (No) (normal/mirror) VDD(54/50) VSS(35, 69) V1-V5 (42-46/62-58) S1-S80 (34-2, 128-82/ 70-128, 2-28 C1-C16 (66-81/38-23) OSC1, OSC2 (37, 36/67, 68) Output Input (OSC1) Output (OSC2) CLK1, CLK2 (47, 48/57, 56) M (49/55) D (50/54) RS (51/53) Output Output Output Input Common output Oscillator Common signal output for LCD driving When using internal oscillator, connect external Rf resistor. If external clock is used, connect it to OSC1. LCD Extension register/ oscillator (OSC1) Extension driver Extension driver Extension driver MPU Output I/O - Name Power supply Power supply Segment output Description for logical circuit (+3V, +5V) 0V (GND) Bias voltage level for LCD driving Segment signal output for LCD driving LCD Interface Power supply
Extension driver latch Each outputs extension driver latch clock (CLK1)/Shift (CLK2) clock and extension driver shift clock Alternated signal for LCD driver output Display data interface Register select Outputs the alternating signal to convert LCD driver waveform to AC. Output extension driver data (the 41st dot's data) Used s register selection input. When RS = 1, Data register is selected. When RS = 0, Instruction register is selected Used as read/write selection input. When RW = 1, read operation. When RW = 0, write operation. Used as read. Write enable signal. When 8-bit bus mode, used as low order bi-directional data bus. During 4-bit bus mode open these pins. When 8-bit bus mode, used as high order bi-directional data bus. In case of 4-bit bus mode, used as both high and low order. DB7 used for Busy Flag output. This pin must be fixed to VDD or open.
RW (52/52)
Input
Read/Write
MPU
E (53/51) DB0-DB3 (55-58/49-46) DB4-DB7 (59-62/45-42)
Input Input/ Output Input/ Output
Read/Write Enable Data bus 0-3
MPU MPU
Data bus 4-7
MPU
TEST(63/41)
Input
Test pin
-
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S6A0070
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
FUNCTION DESCRIPTION
System Interface This chip has both kinds of interface type with MPU: 4-bit bus and 8-bit bus. 4-bit bus and 8-bit bus are selected by the DL bit in the instruction register. During read or write operation, two 8-bit registers are used. One is the data register (DR), and the other is the instruction register (IR). The data register (DR) is used as temporary data storage place for being written into or read from DRAM/CGRAM. Target RAM is selected by RAM address setting instruction. Each internal operation, reading from or writing into RAM, is done automatically. After MPU reads DR data, the data in the next DDRAM/CGRAM address is transferred into DR automatically. Also, after MPU writes data to DR, the data in DR is transferred into DDRAM/CGRAM automatically. The instruction register (IR) is used only to store instruction codes transferred from MPU. MPU cannot use it to read instruction data. To select a register, use RS input pin in 4-bit/8-bit bus mode. Table 4. Various Kinds of Operations to RS and R/W bits. RS 0 0 1 1 R/W 0 1 0 1 Operation Instruction Write operation (MPU writes instruction code into IR) Read Busy flag (DB7) and address counter (DB0 - DB7) Data Write operation (MPU writes data into DR) Data Read operation (MPU reads data into DR)
Busy Flag (BF) When BF = 1, it indicates that the internal operation is being processed. So during this time the next instruction cannot be accepted. BF can be read, when RS = 0, and R/W = 1. (Read Instruction Operation), through DB7 port. Before executing the next instruction, be sure that BF is not 1.
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
Address Counter (AC) The Address Counter (AC) stores DDRAM/CGRAM addresses, transferred from IR. After writing into (reading from) DDRAM/CGRAM. AC is automatically increased (decreased) by 1. When RS = 0 and R/W = 1, AC can be read through ports DB0 - DB6. Display Data RAM (DDRAM) DDRAM stores display data of maximum 80 x 8 bits (80 characters). DDRAM address is set in the address counter (AC) as a hexadecimal number. (Refer to Figure 5).
MSB AC6 AC5 AC4 AC3 AC2 AC1
LSB AC0
Figure 5. DDRAM Address 1) 1-line Display In the case of a 1-line display, the address range of DDRAM is 00H - 04H. An Extension driver will be used. Figure 6 shows the example when a 40-segment extension driver is added. 2) 2-line Display In the case of a 2-line display, the address range of DDRAM is 00H - 27H and 40H - 67H. An Extension driver will be used. Figure 7 shows the example a 40 segment extension driver is added.
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
1
2
3
4
5
6
7
8
9
10 11
12 13 14
15 16
17 18 19 10 11 12
20 21 22 13 14 15
23 24 16 17
COM1 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F COM8
SEG1 S6A0070 SEG80
SEG1 Extension driver (40 SEG) SEG40
1
2
3
4
5
6
7
8
9
10 11
12 13 14
15 16
17 18 19 11 12 13
20 21 22 14 15 16
23 24 17 18
COM1 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 COM8
SEG1 S6A0070 SEG80 (After Shift Left) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SEG1 Extension driver (40 SEG) SEG40
17 18 19 0F 10 11
20 21 22 12 13 14
23 24 15 16
COM1 4F 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E COM8
SEG1 S6A0070 SEG80 (After Shift Right)
SEG1 Extension driver (40 SEG) SEG40
Figure 6. 1-line x 24ch. Display with 40 SEG. Extension Driver
1
2
3
4
5
6
7
8
9
10 11
12 13 14
15 16
17 18 19 10 11 12
20 21 22 13 14 15
23 24 16 17
COM1
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
COM8 COM9 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F COM16
SEG1 S6A0070 SEG80 50 51 52 53 54 55 56 57
SEG1 Extension driver (40 SEG) SEG40
1
2
3
4
5
6
7
8
9
10 11
12 13 14
15 16
17 18 19 11 12 13
20 21 22 14 15 16
23 24 17 18
COM1 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 COM8 COM9 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 COM16
SEG1 S6A0070 SEG80 (After Shift Left) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
51 52 53
54 55 56
57 58
SEG1 Extension driver (40 SEG) SEG40
17 18 19 0F 10 11
20 21 22 12 13 14
23 24 15 16
COM1 27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E COM8 COM9 67 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E COM16
SEG1 S6A0070 SEG80 (After Shift Right)
4F 50 51
52 53 54
55 56
SEG1 Extension driver (40 SEG) SEG40
Figure 7. 2-line x 24ch. Display with 40 SEG. Extension Driver
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
CGROM (Characteristic Generator ROM) CGROM has a 5 x 7 dots 192 character pattern, and a 5 x 7 10 dots 32 character pattern CGRAM (Character Generator RAM) CGRAM has up to 5 x 8 dots 8 characters. By writing font data to CGRAM, user defined characters can be used (Refer to table 5). Timing Generation Circuit Timing generation circuit generates clock signals for the internal operations. LCD Driver Circuit LCD Driver circuit has 16 common and 80 segment signals for LCD driving. Data from CGRAM/CGROM is transferred to an 80-bit segment latch serially, and then stored to an 80-bit shift latch. When each com is selected by a 16-bit common register, segment data is also output through the segment driver from and 80-bit segment latch. In case of a 1-line display mode, COM1 - COM8 have 1/8 duty or COM1-COM11 have a 1/11 duty. In a 2-line display mode, COM1 - COM16 have a 1/16 duty ratio. Cursor/Blink Control Circuit It controls cursor/blink ON/OFF at cursor position.
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Table 5. Relationship Between Character Code (DDRAM) and Character Pattern (CGROM)
Character Code (DDRAM data) CGRAM Address CGRAM Data D7 D6 D5 D4 D3 D2 D1 D0 A5 A4 A3 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P0 0000x 000000000x x x 01110 001 10001 010 10001 . . . 011 11111 . . . . . . 100 10001 . . . 101 10001 . . . 110 10001 1 . . . . . 0 0 0 0 x 1 1 1 1 1 . . . . . 1 1 1 0 . . . . . 1 1 1 1 1 1 1 0 0 0 0 0 . . . . . Pattern 8 Pattern number Pattern 1
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
x
x
x
0 0 0 1 0 0 0 0
0 0 0 1 0 0 0 0
0 0 0 1 0 0 0 0
1 1 1 1 1 1 1 0
. . . . .
. . . . .
. . . . .
"x": Don't care.
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
INSTRUCTION DESCRIPTION
OUTLINE To overcome the speed difference between internal clock of S6A0070 and MPU clock, S6A0070 performs internal operation by storing control information to IR or DR. The internal operation is determined according to the signal from MPU, composed of read/write and data bus. (refer to Table 7) Instruction can be divided largely four kinds, (1) S6A0070 function set instructions (set display methods, set data length, etc.) (2) Address set instructions to internal RAM (3) Data transfer instructions with internal RAM (4) Others The address of internal RAM is automatically increased or decreased by 1.
NOTE: During internal operation, Busy Flag (DB7) is read "1". Busy Flag check must be precede by the next instruction. When you make an MPU program with checking the Busy Flag (DB7) is made, it must be necessary 1/2 fosc for executing the next instruction by falling E signal after the Busy Flag (DB7) goes to "0".
CONTENTS Clear Display RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 1
Clear all the display data by writing "20H" (space code) to all DDRAM address, and set DDRAM address to "00H" in the AC (address counter). Return cursor to the original status, namely, bring the cursor to the left edge on first line of the display. Make entry mode increment (I/D = "1"). Return Home RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 1 DB0 x
Return Home is cursor return home instruction. Set DDRAM address to "00H" in the address counter. Return cursor to its original site and return display to its original status, if shifted. Contents of DDRAM does not change.
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S6A0070
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Entry Mode Set RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 1 DB1 I/D DB0 SH
Set the moving direction of cursor and display. I/D : Increment/decrement of DDRAM address (cursor or blink) When I/D = "1", cursor/blink moves to right and DDRAM address is increased by 1. When I/D = "0", cursor/blink moves to left and DDRAM address is decreased by 1. * CGRAM operates the same as DDRAM, when reading from or writing to CGRAM. SH: Shift of entire display When DDRAM read (CGRAM read/write) operation or SH = "0", shift of entire display is not performed. If SH = "1" and DDRAM write operation, shift of entire display is performed according to I/D value (I/D = "1" : shift left, I/D = "0" : shift right). Display ON/OFF Control RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 1 DB2 D DB1 C DB0 B
Control display/cursor/blink ON/OFF 1 bit register. D : Display ON/OFF Control Bit When D = "1", entire display is turned on. When D = "0", display is turned off, but display data remained in DDRAM. C : Cursor ON/OFF Control Bit When C = "1", cursor is turned on. When C = "0", cursor is disappeared in current display, but I/D register remains its data. B : Cursor Blink ON/OFF Control Bit When B = "1", cursor blink is on, which performs alternate between all the "1" data and display character at the cursor position. When B = "0", blink is off.
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S6A0070
Cursor or Display Shift RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 1 DB3 S/C DB2 R/L DB1 x DB0 x
Without waiting or reading the display data, shift right/left cursor position or display. This instruction is used to correct or search display data. (Refer to table 6) During 2-line mode display, cursor moves to the 2nd line after the 40th digit of the 1st line. Note that display shift is performed simultaneously in all the lines. When displayed data is shifted repeatedly, each line is shifted individually. When display shift is performed, the contents of the address counter are not changed. Table 6. Shift Patterns According to S/C and R/L Bits S/C 0 0 1 1 R/L 0 1 0 1 Operation Shift cursor to the left, AC is decreased by 1 Shift cursor to the right, AC is increased by 1 Shift all the display to the left, cursor moves according to the display Shift all the display to the right, cursor moves according to the display
Function Set RS 0 R/W 0 DB7 0 DB6 0 DB5 1 DB4 DL DB3 N DB2 F DB1 x DB0 x
DL : Interface data length control bit When DL = "1", it means 8-bit bus mode with MPU. When DL = "0", it means 4-bit bus mode with MPU. So to speak, DL is a signal to select 8-bit or 4-bit bus mode. When 4-bit bus mode, it needs to transfer 4-bit data in two times. N : Display line number control bit When N = "0", it means 1-line display mode. When N = "1", 2-line display mode is set. F : Display font type control bit When F = "0", 5 x 7 dots format display mode When F = "1", 5 x 10 dots format display mode. Set CGRAM Address RS 0 R/W 0 DB7 0 DB6 1 DB5 AC5 DB4 AC4 DB3 AC3 DB2 AC2 DB1 AC1 DB0 AC0
Set CGRAM address to AC. This instruction makes CGRAM data available from MPU.
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Set DDRAM Address RS 0 R/W 0 DB7 1 DB6 AC6 DB5 AC5 DB4 AC4 DB3 AC3 DB2 AC2 DB1 AC1 DB0 AC0
Set DDRAM address to AC. This instruction makes DDRAM data available from MPU. When 1-line display mode (N = 0), DDRAM address is from "00H" to "4FH". In 2-line display mode (N = 1), DDRAM address in the 1st line is from "00H" to "27H", and DDRAM address in the 2nd line is from "40H" to "67H". Read Busy Flag & Address RS 0 R/W 0 DB7 BF DB6 AC6 DB5 AC5 DB4 AC4 DB3 AC3 DB2 AC2 DB1 AC1 DB0 AC0
This instruction shows whether S6A0070 is in internal operation or not. If the resultant BF is "1", it means the internal operation is in progress and you have to wait until BF to be Low, and then the next instruction can be performed. In this instruction you can read also the value of address counter. Write Data to RAM RS 1 R/W 0 DB7 D7 DB6 D6 DB5 D5 DB4 D4 DB3 D3 DB2 D2 DB1 D1 DB0 D0
Write binary 8-bit data to DDRAM/CGRAM. The selection of RAM from DDRAM, and CGRAM, is set by the previous address set instruction: CDDRAM address set, CGRAM address set). RAM set instruction can also determine the AC direction to RAM. After write operation, the address is automatically increased/decreased by 1, according to the entry mode. Read Data from RAM RS 1 R/W 1 DB7 D7 DB6 D6 DB5 D5 DB4 D4 DB3 D3 DB2 D2 DB1 D1 DB0 D0
Read binary 8-bit data from DDRAM/CGRAM. The selection of RAM is set by the previous address set instruction. If the address set instruction of RAM is not performed before this instruction, the data that is read first is invalid, because the direction of AC is not determined. If you read RAM data several times without RAM address set instruction before read operation, you can get correct RAM data from the second, but the first data would be incorrect, because there is no time margin to transfer RAM data. In case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM address set instruction; it also transfer RAM data to output data register. After read operation address counter is automatically increased/decreased by 1 according to the entry mode. After CGRAM read operation, display shift may not be executed correctly.
NOTE: In case of RAM write operation, after this AC is increased/decreased by 1 like reading operation. In this time, AC indicates the next address position, but you can read only the previous data by read instruction.
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
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Table 7. Instruction Table
Instruction
RS R/W DB7
Instruction Code
DB6 DB5 DB4 DB3 DB2 DB1 DB0
Description Instruction Code
Execution Time (fOSC=270kHz)
1.53ms
Clear Display
0
0
0
0
0
0
0
0
0
1
Write "20H" to DDRAM. and set DDRAM address to "00H" from AC. Set DDRAM address to "00H" from AC and return cursor to its original position if shifted. Assign cursor moving direction and enable the shift of entire display Set display(D), cursor(C), and blinking of cursor(B) on/off control bit. Set cursor moving and display shift control bit, and the direction, without changing DDRAM data. Set interface data length (DL : 4bit/8-bit), numbers of display line (N : 1-line/2-line), display font type(F :0 ..) Set CGRAM address in address counter. Set DDRAM address in address counter. Whether during internal operation or not can be known by reading BF. The contents of address counter can also be read. Write data into internal RAM (DDRAM/CGRAM). Read data from internal RAM (DDRAM/CGRAM).
Return Home
0
0
0
0
0
0
0
0
1
X
1.53ms
Entry Mode Set
0
0
0
0
0
0
0
1
I/D
SH
39s
Display ON/OFF Control Cursor or Display Shift
0
0
0
0
0
0
1
D
C
B
39s
0
0
0
0
0
1
S/C
R/L
X
X
39s
Function Set
0
0
0
0
1
DL
N
F
X
X
39s
Set CGRAM Address Set DDRAM Address Read Busy Flag and Address
0
0
0
1
AC5
AC4
AC3
AC2
AC1
AC0
39s
0
0
1
AC6
AC5
AC4
AC3
AC2
AC1
AC0
39s
0
1
BF
AC6
AC5
AC4
AC3
AC2
AC1
AC0
0s
Write Data to RAM Read Data from RAM
1
0
D7
D6
D5
D4
D3
D2
D1
D0
43s
1
1
D7
D6
D5
D4
D3
D2
D1
D0
43s
NOTE:
When an MPU program with checking the Busy Flag (DB7) is made, it must be necessary 1/2 fosc is necessary for executing the next instruction by the falling edge of the 'E' signal after the Busy Flag (DB7) goes to "0".
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTERFACE WITH MPU Interface with 8-bit MPU When interfacing data length is 8-bit, transfer is performed all at once through 8 ports, from DB0 to DB7. Example of timing sequence is shown below.
RS R/W E Internal signal DB7 DATA
Internal Operation No Busy
Busy
Busy
DATA
Instruction
Busy Flag Check
Busy Flag Check
Busy Flag Check
Instruction
Figure 8. Example of 8-bit Bus Mode Timing Diagram Interface with 4-bit MPU When interfacing data length is 4-bit, only 4 ports, from DB4 to DB7, are used as data bus. At first higher 4-bit (in case of 8-bit bus mode, the contents of DB4 - DB7) are transferred, and then lower 4-bit (in case of 8-bit bus mode, the contents of DB0 - DB3) are transferred. So transfer is performed by two parts. Busy Flag outputs "1" after the second transfer are ended. Example of timing sequence is shown below.
RS R/W E Internal signal DB7 D7 D3
Internal Operation No Busy
Busy
AC3
AC3
D7
D3
Instruction
Busy Flag Check
Busy Flag Check
Instruction
Figure 9. Example of 4-bit Bus Mode Timing Diagram
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S6A0070
APPLICATION INFORMATION ACCORDING TO LCD PANEL LCD Panel: 16 character x 1-line character format; 5 x 7 dots + 1-cursor line (1/4 bias, 1/8 duty)
COM1 . . . COM7 COM8 SEG1 S6A0070 . . .
SEG10 SEG78 SEG79 SEG80 ..
LCD Panel: 16 character x 1-line character format; 5 x 10 dots + 1-cursor line (1/4 bias, 1/11 duty)
COM1
. . . COM10 COM11 S6A0070 SEG1 . . .
SEG10 SEG78 SEG79 SEG80 ..
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
LCD Panel: 16 character x 2-line character format; 5 x 7 dots + 1-cursor line (1/5 bias, 1/16 duty)
COM1 . . . COM7 COM8 COM9 . . . S6A0070 COM15 COM16 SEG1 . . .
SEG10 .. SEG80 24
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
LCD Panel: 32 character x 1-line Character format; 5 x 7 dots + 1-cursor line (1/5 bias, 1/16 duty)
COM1 . . . COM7 COM8 SEG1 . . .
S6A0070
SEG10 SEG80 COM9 . . . COM16 ..
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
LCD Panel: 4 character x 2-line character format: 5 x 7 dots + 1-cursor line (1/4 bias, 1/8 duty)
SEG1 . . .
SEG10 .. SEG40 COM1 . . . COM7 COM8 S6A0070 SEG41 . . . SEG50 .. SEG80 26
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
APPLICATION CIRCUIT Figure 10. S6A0070 Application Circuit
LCD Panel C1-C16 S1-S80 D OSC1 OSC2 SC1-S4C0 DL2 DL1 DL1 FCS DR2 SHL1 CL1 SHL2 CL2 VSS M VDD S6A0065 V6 V5 V4 V3 V2 V1 VEE SC1-S4C0 DL2 DL1 DL1 DR2 FCS CL1 SHL1 CL2 SHL2 M VSS VDD S6A0065 V6 V5 V4 V3 V2 V1 VEE SC1-S4C0 DL2 DL1 DL1 DR2 FCS CL1 SHL1 CL2 SHL2 M VSS VDD V6 V5 V4 V3 V2 V1 VEE S6A0065
DB0-DB7
To MPU
GND or Other voltage
NOTE:
When S6A0065 is externally connected to the S6A0070, you can increase the number of display digits up to 80 characters.
VLCD (1/5 bias) 27
S6A0070 VSS M CLK1 CLK2 VDD V1 V2 V3 V4 V5
VDD V1 V2 V3 V4 V5
S6A0070
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BIAS VOLTAGE DIVIDE CIRCUIT
VDD
R R R
R GND or Other voltage
VDD V1 V2 S6A0070 V3 V4 V5
VDD
R R R R
R GND or Other voltage
VDD V1 V2 S6A0070 V3 V4 V5
Figure 11. 1/4 bias, 1/8 or 1/11 duty
Figure 12. 1/5 bias, 1/16 duty
INITIALIZING When the power is turned on, S6A0070 is initialized automatically by power on reset circuit. During the initialization, the following instructions are executed, and BF(Busy Flag) is kept "High"(busy state) to the end of initialization. (1) Display Clear instruction: Write "20H" to all DDRAM (2) Set Functions instruction DL = 1 : 8-bit bus mode N = 1 : 2-line display mode F = 0 : 5 x 7 font type (3) Control Display ON/OFF instruction D = 0 : Display OFF C = 0 : Cursor OFF B = 0 : Blink OFF (4) Set Entry Mode instruction I/D = 1 : Increment by 1 SH = 0 : No entire display shift
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
FRAME FREQUENCY
1-line selection period 1 VDD V1 COM1 V4 V5 .. ... ... 2 3 4 ... 7 8 1 2 3 ... 7 8
Figure 13. 1/8 Duty Cycle (A-Type Waveform)
Item Line Selection Period Frame Frequency
NOTE: fOSC = 270kHz (1 clock = 3.7s)
Clock/Frequency 400 clocks 84.4Hz
1-line selection period 1 VDD V1 COM1 ... ... V4 V5 .. 2 3 4 ... 10 11 1 2 3 ... 10 11
Figure 14. 1/11 Duty Cycle (A-Type Waveform)
Item Line Selection Period Frame Frequency
NOTE: fOSC = 270kHz (1 clock = 3.7s)
Clock/Frequency 400 clocks 61.4Hz
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
1-line selection period 1 VDD V1 COM1 V4 V5 .. ... ... 2 3 4 ... 15 16 1 2 3 ... 15 16
Figure 15. 1/16 Duty Cycle (A-Type Waveform)
Item Line Selection Period Frame Frequency
NOTE: fOSC = 270kHz (1 clock = 3.7s)
Clock/Frequency 200 clocks 84.4Hz
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
INITIALIZING BY INSTRUCTION
8-bit Interface Mode
Power On
Wait for more than 20ms after VDD rises to 4.5 V. Wait for more than 30ms after VDD rises to 2.7 V.
Condition: fosc = 270kHz 0 N 1-line mode 2-line mode 5 x 7 dots 5 x 10 dots
Function Set RS 0 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 N DB2 F DB1 x DB0
1 0 x F 1
Wait for more than 39 us 0 D 1 Display ON/OFF Control RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 1 DB2 D DB1 C DB0 C B 1 0 Wait for more than 39 u s B 1 Display Clear RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 1 Blink on Cursor on Blink off 0 Cursor off Display on Display off
Wait for more than 1.53 ms 0 I/D Entry Mode Set RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 1 DB1 I/D DB0 0 SH SH 1 Initialization End Entire shift on Entire shift off 1 Increment mode Decrement mode
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
4-bit Interface Mode
Power On
Wait for more than 30ms after VD D rises to 4.5V Wait for more than 40ms after VD D rises to 2.7V
Function Set (4-bit mode chage) RS 0 R/W 0 DB7 0 DB6 0 DB5 1 DB4 DL DB3 x DB2 x DB1 x DB0
Condition: fosc = 270kHz 0 x DL 1 0 N 1 2-line mode 5 x 7 dots 5 x 10 dots 4-bit mode 8-bit mode 1-line mode
Wait for more than 39 s
Function Set (display mode set) 0 0 0 0 0 0 N 0 F 1 x 0 x x x x x x x x x F 1
Wait for more than 39 s D Display ON/OFF Control RS 0 0 R/W 0 0 DB7 0 1 DB6 0 D DB5 0 C DB4 0 B DB3 x x DB2 x x DB1 x x DB0 x x B Wait for more than 39 s C
0 1 0 1 0 1
Display off Display on Cursor off Cursor on Blink off Blink on
Display Clear RS 0 0 R/W 0 0 DB7 0 0 DB6 0 0 DB5 0 0 DB4 0 1 DB3 x x DB2 x x DB1 x x DB0 x x
Wait for more than 1.53 s 0 Entry Mode Set RS 0 0 R/W 0 0 DB7 0 0 DB6 0 1 DB5 0 I/D DB4 0 SH DB3 x x DB2 x x DB1 x x DB0 x x SH I/D 1 0 1 Increment mode Entire shift off Entire shift on Decrement mode
Initialization End
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
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EXAMPLE OF INSTRUCTION AND DISPLAY CORRESPONDENCE
1. Power supply on: Initialized by the internal power on reset circuit RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
LCD DISPLAY
2. Function Set: 8-bit, 2-line, 5 x 7 dot RS 0 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 1 DB2 0 DB1 X DB0 X
3. Display ON/OFF Control: Display/Cursor on/blink off RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 1 DB2 1 DB1 1 DB0 _ 0
4. Entry Mode Set: Increment RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 1 DB1 1 DB0 _ 0
5. Write Data to DDRAM: Write S RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 1 DB3 0 DB2 0 DB1 1 DB0 S_ 1
6. Write Data to DDRAM: Write A RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 SA_ 1
7. Write Data to DDRAM: Write M RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 1 DB2 1 DB1 0 DB0 SAM _ 1
8. Write Data to DDRAM: Write S RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 1 DB3 0 DB2 0 DB1 1 DB0 1 SAMS _
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
9. Write Data to DDRAM: Write U RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 1 DB3 0 DB2 1 DB1 0 DB0 1
LCD DISPLAY SAMSU_
10. Write Data to DDRAM: Write N RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 1 DB2 1 DB1 1 DB0 0 SAMSUN_
11. Write Data to DDRAM: Write G RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 0 DB2 1 DB1 1 DB0 1 SAMSUNG_
12. Set DDRAM Address: 40H RS 0 R/W 0 DB7 1 DB6 1 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 0 SAMUNG _
13. Write Data to DDRAM: Write S RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 1 DB3 0 DB2 0 DB1 1 DB0 1 SAMUNG S_
14. Write Data to DDRAM: Write 6 RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 1 DB1 1 DB0 0 SAMSUNG S6_
15. Write Data to DDRAM: Write A RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 1 SAMSUNG S6A_
16. Write Data to DDRAM: Write 0 RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 0 DB1 0 DB0 0 SAMSUNG S6A0_
17. Write Data to DDRAM: Write 0 RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 0 DB1 0 DB0 0 SAMSUNG S6A00_
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
18. Write Data to DDRAM: Write 7 RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 1 DB1 1 DB0 1
LCD DISPLAY SAMUNG S6A007_
19. Write Data to DDRAM: Write 2 RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 0 DB1 1 DB0 0 SAMUNG S6A0072_
20. Cursor or Display Shift: Cursor shift left RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 1 DB3 0 DB2 0 DB1 x DB0 x SAMUNG S6A0072
21. Write Data to DDRAM: Write 0 RS 1 R/W 0 DB7 0 DB6 0 DB5 1 DB4 1 DB3 0 DB2 0 DB1 0 DB0 0 SAMUNG S6A0070_
22. Entry Mode Set: Entire shift Enable RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 1 DB1 1 DB0 1 SAMUNG S6A0070_
23. Write Data to DDRAM: Write B RS 1 R/W 0 DB7 0 DB6 1 DB5 0 DB4 0 DB3 0 DB2 0 DB1 1 DB0 0 SAMUNG S6A0070B_
24. Return Hone RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 1 DB0 x SAMUNG S6A0070B
25. Clear Display RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 1 _
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
MAXIMUM ABSOLUTE LIMIT
Item Power Supply Voltage Power Supply Voltage Input Voltage
NOTE:
Symbol VDD VLCD VIN
Unit V V V
Value -0.3 to + 7.0 VDD -15 to VDD + 0.3 -0.3 to VDD + 0.3
Voltage greater than above may damage the circuit (VDD V1 V2 V3 V4 V5)
Temperature Characteristics Item Operating Temperature Storage Temperature Symbol TOPR TSTG Unit C C Value - 30 to + 85 - 55 to + 125
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
ELECTRICAL CHARACTERISTICS
DC Characteristics (V DD = 4.5V to 5.5V, TA = - 30 to + 85C) Item Operating Voltage Supply Current Symbol VDD IDD1 IDD2 Input Voltage (1) (except OSC1) Input Voltage (2) (except OSC1) Output Voltage (1) (DB0 to DB7) Output Voltage (2) (except DB0 to DB7) Voltage Drop VIH1 VIL1 VIH2 VIL2 VOH1 VOL1 VOH2 VOL2 VdCOM VdSEG Input Leakage Current Low Input Current Internal Clock (external Rf) IIL IIN fIC fEC External Clock duty fR, tF LCD Driving Voltage VLCD VDD-5V (1/5, 1/4 bias) IOH = -0.205mA IOL = 1.2mA IO = -40A IO = 40A IO = 0.1mA IO = 0.1mA VIN = 0V to VDD VIN = 0V, VDD = 5V (pull-up) Rf = 91k 2% (V DD = 5V) - Condition - ceramic resonator fOSC = 250kHz Resistor oscillation external clock operation fOSC = 270kHz - - - - Min 4.5 - - 2.2 -0.3 VDD-1.0 -0.2 2.4 - 0.9V DD - - - -1 -50 190 150 45 - 4.6 Typ - 0.7 0.4 - - - - - - - - - - - -125 270 250 50 - - Max 5.5 1.0 0.6 VDD 0.6 VDD 1.0 - 0.4 - 0.1V DD 1 1 1 -250 350 350 55 0.2 10.0 Unit V mA mA V V V V V V V V V V A A kHz kHz % s V
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(V DD = 2.7V to 4.5V, TA = - 30 to + 85C) Item Operating Voltage Supply Current Symbol VDD IDD1 IDD2 Input Voltage (1) (except OSC1) Input Voltage (2) (except OSC1) Output Voltage (1) (DB0 to DB7) Output Voltage (2) (except DB0 to DB7) Voltage Drop VIH1 VIL1 VIH2 VIL2 VOH1 VOL1 VOH2 VOL2 VdCOM VdSEG Input Leakage Current Low Input Current Internal Clock (external Rf) External Clock IIL IIN fIC fEC duty fR, tF LCD Driving Voltage(note)
NOTE: LCD Driving Voltage.
Condition - ceramic resonator fOSC = 250kHz Resistor oscillation external clock operation fOSC = 270kHz - - - - IOH = -0.1mA IOL = 0.1mA IO = -40A IO = 40A IO = 0.1mA IO = 0.1mA VIN = 0V to VDD VIN = 0V, VDD = 5V (pull-up) Rf = 75k 2% (V DD = 3V) -
Min 2.7 - - 0.7V DD -0.3 0.7V DD - 2.0 - 0.8V DD - - - -1 -10 190 125 45 -
Typ - 0.3 0.17 - - - - - - - - - - - -50 250 270 50 - -
Max 4.5 0.5 0.3 VDD 0.4 VDD 0.2V DD - 0.4 - 0.2V DD 1 1.5 1 -120 350 350 55 0.2 10.0
Unit V mA mA V V V V V V V V V V A A kHz kHz % s V
VLCD
VDD-V5 (1/5, 1/4 bias)
3.0
LCD Driving Voltage Power VDD V1 V2 V3 V4 Duty Bias 1/8, 1/11 Duty 1/4 Bias VDD VDD - VLCD/4 VDD - VLCD/2 VDD - VLCD/2 VDD - 3V LCD/4 1/16 Duty 1/5 Bias VDD VDD - VLCD/5 VDD - 2V LCD/5 VDD - 3V LCD/5 VDD - 4V LCD/5
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
V5
VDD - VLCD
VDD - VLCD
AC Characteristics (V DD = 4.5 to 5.5V, Ta = - 30 to + 85C) Mode Write Mode (Refer to Figure 6) Item E Cycle Time E Rise/Fall Time E Pulse Width (High, Low) R/W and RS Setup Time R/W and RS Hold Time Data Setup Time Data Hold Time Read mode (Refer to Figure 7) E Cycle Time E Rise/Fall Time E Pulse Width (High, Low) R/W and RS Setup Time R/W and RS Hold Time Data Output Delay Time Data Hold Time Symbol tC tR, tF tW tSU1 tH1 tSU2 tH2 tC tR, tF tW tSU tH tD tDH Min 500 - 220 40 10 60 10 500 - 220 40 10 - 20 Typ - - - - - - - - - - - - - - Max - 25 - - - - - - 25 - - - 120 - Unit ns
(V DD = 2.7 to 4.5V, TA = - 30 to + 85C) Mode Write Mode (Refer to Figure 6) Item E Cycle Time E Rise/Fall Time E Pulse Width (High, Low) R/W and RS Setup Time R/W and RS Hold Time Data Setup Time Data Hold Time Read mode (Refer to Figure 7) E Cycle Time E Rise/Fall Time E Pulse Width (High, Low) R/W and RS Setup Time R/W and RS Hold Time Symbol tC tR, tF tW tSU1 tH1 tSU2 tH2 tC tR, tF tW tSU tH Min 1400 - 400 60 20 140 10 1400 - 400 60 20 Typ - - - - - - - - - - - - Max - 25 - - - - - - 25 - - - Unit ns
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S6A0070
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Data Output Delay Time Data Hold Time
tD tDH
- 5
- -
360 -
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16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0070
Mode
Item Clock Pulse Width (High, Low)
Symbol tW tR, tF tSU1 tSU2 tDH tDW
Min 800 - 500 300 300 -1000
Typ - - - - - -
Max - 100 - - - 1000
Unit ns ns ns ns ns ns
Interface Mode with Extension Driver (Refer to Figure 8)
Clock Rise/Fall Time Clock Setup Time Data Setup Time Data Hold Time M Delay Time
RS
VIH1 VIL1 tsu1 VIL1 tw
th1 VIL1 th1 tf
R/W
E tr DB0 - DB7
VIH1 VIL1 VIH1 VIL1
tsu2 Valid Data tc
th2 VIH1 VIL1
Figure 16. Write Mode Timing Diagram
41
S6A0070
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
RS
VIH1 VIL1 tsu VIH1 tw
th VIH1 th1 tf VIH1 VIL1 tD VIH1 VIL1 tDH Valid Data tc VIH1 VIL1
R/W
E tr DB0 - DB7
VIH1 VIL1
VIL1
Figure 17. Read Mode Timing Diagram
tf CLK1 VOH2 tr CLK2 VOH2 VOL2 tSU1 D tSU1 M tDM tDH VOH2 tw VOL2 tw VOH2 VOL2 tw VOH2 VOL2
Figure 18. Interface Mode with Extension Driver Timing Diagram
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